Job Overview
| Particulars | Details |
|---|---|
| Position | Physical Design Lead / Design Verification Engineer / Senior Design Verification Engineer / DFT Engineer |
| Company | eInfochips (An Arrow Company) |
| Location | Bangalore, Noida, Pune, Ahmedabad, Hyderabad, Chennai |
| Job Type | Full-Time |
| Experience | 13 - 13 years |
| Category / Department | IT |
| Application Mode |
🏢 About eInfochips (An Arrow Company)
Company Overview:
eInfochips, an Arrow Electronics company, is a global product engineering and semiconductor design services provider specializing in digital transformation and engineering solutions. The company has developed more than 750 products with over 100 million deployments across 140 countries.
eInfochips provides expertise across IoT, AI/ML, security, sensors, silicon, wireless, cloud, power, embedded systems, and software engineering. The company has more than 30 years of engineering experience and serves customers across multiple industries.
Company Mission:
To deliver secure, high-quality solutions in Silicon Engineering, Embedded Systems, and Software Engineering while building strong partnerships with customers and continuously improving quality and environmental management.
Company Vision:
Not Provided
Core Values / Principles
Customer First
Disciplined Execution
Embracing Impossible Challenges
Continuous Learning
Serving Society
Quality
Innovation
Customer partnership
Ahmedabad, India
💡 Editor's Note / Preparation Tip
Resume Tips:
Clearly identify the specific VLSI position you are applying for.
Highlight relevant experience in ASIC, SoC, semiconductor, or silicon engineering.
Physical Design candidates: Emphasize physical design implementation and relevant project experience.
Verification candidates: Highlight design verification, verification methodologies, and ASIC/SoC projects.
DFT candidates: Highlight DFT, test architecture, and semiconductor testing experience.
Mention the tools, methodologies, and technologies you have actually used.
Clearly show the number of years of relevant experience.
Highlight complex semiconductor projects and measurable technical contributions.
Interview Preparation:
Revise VLSI and semiconductor fundamentals.
Prepare position-specific questions around physical design, verification, or DFT.
Review ASIC and SoC development flows.
Be prepared to explain your previous semiconductor projects in detail.
Review verification methodologies and debugging approaches if applying for verification roles.
Review physical design concepts and implementation flows for Physical Design roles.
Revise DFT concepts and methodologies for DFT positions.
Prepare examples of challenging technical issues you solved in previous projects.
Professional Tips:
Apply for the role that most closely matches your technical specialization.
Tailor your resume separately for Physical Design, Verification, or DFT positions.
Include relevant semiconductor tools and technologies only where you have genuine experience.
Clearly mention your preferred location from the listed cities.
Highlight experience with complex ASIC/SoC programs and production-oriented engineering work.
📝 Job Description
Position Details:
eInfochips is expanding its VLSI engineering team and looking for experienced semiconductor professionals to work on ASIC, SoC, design verification, DFT, and physical design initiatives.
The available positions include:
Physical Design Lead – 8–13 Years
Locations: Bangalore, Noida, Pune, Ahmedabad
Design Verification Engineer – 5–13 Years
Locations: Bangalore, Noida, Pune, Ahmedabad, Hyderabad, Chennai
Senior Design Verification Engineer – 8+ Years
Locations: Bangalore, Noida, Pune, Ahmedabad, Hyderabad, Chennai
DFT Engineer – 4–13 Years
Locations: Bangalore, Pune, Ahmedabad, Hyderabad, Chennai
The positions are intended for professionals with relevant VLSI and semiconductor engineering expertise who are interested in contributing to next-generation silicon and SoC technologies.
Benefits / Compensation
Salary, benefits, incentives, and other compensation details are Not Provided.
Candidate Requirements:
Relevant experience in VLSI, ASIC, SoC, semiconductor design, verification, DFT, or physical design depending on the position.
Physical Design Lead: 8–13 years of experience.
Design Verification Engineer: 5–13 years of experience.
Senior Design Verification Engineer: 8+ years of experience.
DFT Engineer: 4–13 years of experience.
Strong semiconductor engineering knowledge relevant to the selected position.
Ability to contribute to product engineering and silicon development projects.
Preferred Skills:
VLSI Design
ASIC Design
SoC Development
Physical Design
Design Verification
DFT
Semiconductor Engineering
Silicon Engineering
Product Engineering
Working Days & Hours:
Not Provided
How to Apply:
Interested candidates can send their updated resume to akanksha.pandey@einfochips.com.
🎯 Key Responsibilities
- ✓ Contribute to ASIC and SoC development projects.
- ✓ Perform physical design activities for semiconductor products where applicable.
- ✓ Develop and execute design verification activities.
- ✓ Support functional verification of ASIC/SoC designs.
- ✓ Perform DFT-related engineering activities where applicable.
- ✓ Work on silicon and semiconductor product engineering initiatives.
- ✓ Collaborate with engineering teams to deliver high-quality semiconductor solutions.
- ✓ Apply relevant VLSI engineering methodologies and best practices.
- ✓ Contribute to next-generation semiconductor technology development.
- ✓ Support product engineering activities throughout the development lifecycle.
💡 Required Qualifications & Skills
🚀 Career Guidance & Interview Insights
To help you succeed, we've compiled original preparation guides, resume keywords, and growth analytics for this category of role.
Joining as a Physical Design Lead / Design Verification Engineer / Senior Design Verification Engineer / DFT Engineer offers a fantastic opportunity to work at the forefront of technological innovation. You will be exposed to modern software development lifecycles, collaborate with cross-functional product teams, and design scalable architectures that directly impact end-users. The continuous learning curve in tech ensures that your programming, debugging, and system engineering skills remain highly marketable and sharp.
The career roadmap in technology is highly rewarding. Typical progression starts as a Junior Software Engineer, moving to Associate Developer and then Senior Software Engineer (3-6 years). From there, professionals choose between an individual contributor track—becoming a Tech Lead, Staff Engineer, and Principal Architect—or a management track, advancing to Engineering Manager, Director of Engineering, and Chief Technology Officer (CTO).
Expected Technical & Behavioral Questions:
- Q1: How do you optimize database query performance?
Answer Tip: Talk about indexing strategies, query execution plan analysis, avoiding N+1 queries, and implementing caching layers (like Redis). - Q2: Explain the differences between Microservices and Monolithic architecture.
Answer Tip: Highlight scaling advantages, loose coupling, independent deployments, network latency considerations, and data consistency challenges in microservices. - Q3: How do you handle merge conflicts in Git?
Answer Tip: Explain checking out the local branch, pulling the latest main branch, running git merge, opening the conflicted files to resolve blocks manually, and committing the resolved merge.
To pass automated ATS (Applicant Tracking System) screening and catch the recruiter's eye, tailor your resume with the following tips:
- Keywords to include: Software Engineering, SDLC, OOP, CI/CD Pipelines, SQL databases, Agile, Unit Testing, Code Review, Cloud Architectures (AWS/Azure).
- Format: Use a clean, single-column resume format. Avoid graphics, text boxes, or tables which can scramble ATS parser outputs.
- Quantify Results: Instead of writing 'wrote code', write 'Developed a caching system that reduced server response times by 35%.'
Estimated compensation for this role type in India is ₹12,00,000 - ₹25,00,000+ per annum (Senior/Lead level). The actual salary package offered depends on factors such as company size, work mode (remote or on-site), individual technical proficiency, and negotiations during final HR rounds.
Highly recommended certifications include: AWS Certified Solutions Architect, Microsoft Certified: Azure Fundamentals, Certified Kubernetes Administrator (CKA), Oracle Certified Professional Java SE, or tech-stack specific achievements (e.g. Meta Front-End Developer certification).
Frequently Asked Questions
What positions are available?
The openings are for Physical Design Lead, Design Verification Engineer, Senior Design Verification Engineer, and DFT Engineer.
How much experience is required for the Physical Design Lead role?
The position requires 8–13 years of experience.
How much experience is required for the Design Verification Engineer role?
The position requires 5–13 years of experience.
How much experience is required for the Senior Design Verification Engineer role?
The position requires 8+ years of experience.
How much experience is required for the DFT Engineer role?
The position requires 4–13 years of experience.
Where is the Physical Design Lead position available?
The role is available in Bangalore, Noida, Pune, and Ahmedabad.
Where are the Design Verification positions available?
The Design Verification Engineer and Senior Design Verification Engineer positions are available in Bangalore, Noida, Pune, Ahmedabad, Hyderabad, and Chennai.
Where is the DFT Engineer position available?
The DFT Engineer position is available in Bangalore, Pune, Ahmedabad, Hyderabad, and Chennai.
What technical domain do these positions focus on?
The positions focus on VLSI, ASIC, SoC, semiconductor design, physical design, design verification, and DFT.
How can candidates apply?
Candidates can send their resume to akanksha.pandey@einfochips.com.
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